At a recent developer's presentation in Stanford, Sony unveiled some new information about the PSP and the chip that will power it.
Some of the basic specs of the PSP have already been disclosed. The system will include a 4.3-inch widescreen TFT LCD, use a rechargeable lithium-ion battery, and process AAC and MP3 music as well as a variety of picture and movie formats. Games and other content will be stored on proprietary 1.8-Gbyte UMD optical discs. At the moment, the dimensions of prototypes models come in at around 70mm x 74mm x 23mm, and weigh roughly 260 grams.
Designer Masanobu Okabe described further details of the PSP chipset. At the center of the device will be a 90-nm MIPS R4000 embedded CPU clocking in at speeds up to 333-MHz with a bus speed of 166-MHz. Main system memory is 4-MB. The system will also contain a dedicated graphics processor and a reconfigurable assistant chip that can be programmed on the fly to handle in-game graphics, video decoding, or data manipulation. The 166-MHz graphics core will include 2-MB of embedded graphics memory.
According to Okabe, the PSP's graphics engine will run off a 512-bit interface and be capable of pushing 35 million polygons per second and have a fill rate of 660 million pixels per second. The chipset natively supports a slew of different graphical effects, such as directional lighting, clipping, environment projection, texture mapping, fogging, alpha blending, vertex blending, stenciling, morphing, and dithering, all using either 16- or 32-bit color. The 166-MHz graphics core can be reconfigured on the fly to handle in-game graphics data or to decode H.264 MPEG-4 video / audio.
What this all boils down to is, on paper, the PSP has roughly twice the innate hardware potential as the current PlayStation 2.
One change from the norm concerning the graphics chipset is that programming will center around surface manipulation rather than polygons. At the conference, Okabe displayed a character comparison showing a cartoon character drawn using surfaces and also with polygons. The surface modeled character looked more impressive. For developers' sanity, the chipset WILL also allow standard polygon manipulation as well.
Changing gears to the I/O system, Okabe revealed a few high-tech tidbits. The system will support USB 2.0 and Memory Sticks for transferring data between other PSPs and PCs. Earlier reports stated that the player would be capable of wireless 802.11b WiFi connections, but so far this feature has NOT been finalized. To conserve power, the main chip core's voltage can range between 0.8 and 1.2 volts, and different blocks of gates within the chip can be shut down to further save power. Okabe declined to give a set battery life for the system, stating only that games should yield approximately 4X more battery life than video or music content. Right now, experts in the know are saying that the PSP will squeeze a maximum of 8 hours of play time from a single charge, and that the number will drop to 2-3 hours when playing back video or MP3/AAC audio.
The PSP chipset will be manufactured by Sony Semiconductor Kyusho Corporation, located in Nagasaki Japan. Recently, insiders at Sony have hinted that the PSP may not launch in the U.S. until as late as June 2005. (The system is set to debut in Japan later this year) Since the PSP uses a customized chipset manufactured by Sony, and doesn't use readily available off-the-shelf components, there's a good bet that the reason for the delay is simply that Sony will need time to stockpile enough chips to to satisfy demand for the system's eventual U.S. release. Analysts are predicting that the PSP will sell between 400,000 and 600,000 units during the Japanese launch period alone, and nearly 1 million within the first six months of the system's life span.